In the salicide process (or self-aligned silicide process), where silicide film is formed self-aligned on the gate electrode and diffusion layer of semiconductor device, it is important to form silicide film with uniform thickness and low and stable resistivity on the gate electrode and diffusion layer.
Accordingly, the salicide process using titanium (Ti) that offers silicide film with a low resistivity and proper Schottky-barrier height to p-and n-type silicon has been employed.
However, in this process, according as semiconductor devices are increasingly micro-structured, the impurity concentration on the surface of gate electrode and diffusion layer increases and further the pattern dimensions are also micro-structured. Therefore, for titanium, particularly on n-diffusion layer, the phase transition temperature from high-resistance C49-structured titanium disilicide (TiSi.sub.2) to low-resistance C54-structured titanium disilicide increases and deviates from the phase transition temperature on p-silicon.
Thus, when the thermal treatment temperature during silicidation is adapted for n-diffusion layer, there occurs a problem that on p-gate and p-diffusion layer, due to the excessive silicidation reaction, the leak characteristic of p-n junction deteriorates or silicide film incurs agglomeration. On the other hand, when the thermal treatment temperature during silicidation is adapted for p-gate or p-diffusion layer, there occurs a problem that on n-diffusion layer, due to lack of silicide reaction, the resistance of silicide film increases or the thermal stability lowers. Therefore, the above process is not a satisfactory process to form silicide film self-aligned on the gate electrode and diffusion layer of semiconductor device.
K. Goto et al., Technical Digest of IEEE International Electron Device Meeting 1995 (IDEM95), pp. 449-452 (1995) discloses a process that silicide film is formed self-aligned selectively on the gate electrode and diffusion layer of semiconductor device using cobalt (Co) that gives less difference in silicidation reaction temperature between p-silicon and n-silicon than titanium.
The process is explained in FIGS. 1A to 1D, which are schematic cross sectional views showing the process sequentially.
First, as shown in FIG. 1A, a MOSFET (metal oxide semiconductor field effect transistor) composed of a device separation region 302 formed by selective oxidation (LOCOS), gate oxide film 303, n-gate silicon film 304a, sidewall 305, and n-diffusion layer 306a with 100 nm n.sup.+ /p junction depth is formed on a predetermined region of a silicon substrate 301. Then, as shown in FIG. 1B, 10 nm thick cobalt film 308e is formed thereon by sputtering.
Then, 30 nm thick titanium nitride (TiN) film 309 is formed thereon by sputtering. The titanium nitride film 309 is intended to prevent the oxidation during silicidation thermal treatment of cobalt.
Then, as shown in FIG. 1C, by lamp rapid thermal processing, first thermal treatment is conducted to the silicon substrate 301 in nitrogen atmosphere at 550.degree. C. for 30 seconds. Thereby, the surface of n-gate silicon film 304a and n-diffusion layer 306a is reacted with the cobalt film 308e. Thus, Co.sub.x Si.sub.y film 310 (x.gtoreq.y), which is the reaction layer of Co and Si, is formed self-aligned on the n-gate silicon film 304a and the n-diffusion layer 306a.
Then, as shown in FIG. 1D, unreacted cobalt film left on the titanium nitride film 309, the device separation region or the sidewall is removed by wet etching. Thereafter, by lamp rapid thermal processing, second thermal treatment is conducted in nitrogen atmosphere at 750 to 900.degree. C. for 30 seconds. Thereby, the Co.sub.x Si.sub.y film 310 on the surface of n-gate silicon film 304a and n-diffusion layer 306a is phase-transitioned to cobalt disilicide (CoSi.sub.2) film 311 that is thermally and compositionally stable and at a low resistivity.
In this process, the problems (increased resistance of silicide film, and agglomeration of silicide film), mentioned earlier, due to an increase in the phase-transition temperature from high-resistance C49-structured titanium disilicide to low-resistance C54-structured titanium disilicide in high-concentration impurity region can be solved by using cobalt as silicidation metal instead of titanium, and by forming titanium nitride film as oxidation prevention film for cobalt during thermal treatment on the cobalt film.
However, even when the impurity concentration on the surface of gate and diffusion layer is needed to further increase in order to prevent from being depleted according as devices are further micro-structured, the surface impurity concentration may reduce since, during silicide reaction, impurity such as arsenic (As), phosphorus (P) and boron (B) is absorbed from silicon to silicide film. Such reduction of surface impurity concentration can influence the device characteristic seriously.
Thus, it is not suitable that metal such as cobalt that the silicon consumption during silicidation reaction is more than titanium is applied to the micro-structured semiconductor device that requires high surface impurity concentration. Namely, this process also fails to solve the problems of the prior salicide process thoroughly.